Toward a real system integration; A direction of IC technology

Abstract A direction of IC technology is discussed with relation to mixed signal and interconnects technology for realizing real system integration. IC technology has progressed from an integration of simple digital circuits to an integration of increasingly complicated circuits and devices. Mixed signal technology is currently widely used for SoCs to compensate damage of externally received signals. In CMOS RF circuit technology coping with the size of on-chip inductor technology is vital for many SoCs for wireless systems. Millimeter wave communication will realize Giga-bit wireless data transfer and requires interesting new IC technologies such as a transmission line and an on-chip antenna technology. Transmission of electric power to chips will be an important future IC technology for fine-grained power management systems and ubiquitous systems

Tiam1 interaction with the PAR complex promotes talin-mediated Rac1 activation during polarized cell migration.

Migrating cells acquire front-rear polarity with a leading edge and a trailing tail for directional movement. The Rac exchange factor Tiam1 participates in polarized cell migration with the PAR complex of PAR3, PAR6, and atypical protein kinase C. However, it remains largely unknown how Tiam1 is regulated and contributes to the establishment of polarity in migrating cells. We show here that Tiam1 interacts directly with talin, which binds and activates integrins to mediate their signaling. Tiam1 accumulated at adhesions in a manner dependent on talin and the PAR complex. The interactions of talin with Tiam1 and the PAR complex were required for adhesion-induced Rac1 activation, cell spreading, and migration toward integrin substrates. Furthermore, Tiam1 acted with talin to regulate adhesion turnover. Thus, we propose that Tiam1, with the PAR complex, binds to integrins through talin and, together with the PAR complex, thereby regulates Rac1 activity and adhesion turnover for polarized migration

Design space exploration of low-phase-noise LC-VCO using multiple-divide technique

Abstract — This paper proposes a multiple-divide technique using by-2, by-3, and by-4 frequency dividers to realize a lower phase-noise LC-VCO, and explores the design space of low-phase-noise VCO using the multiple-divide technique. In the simulated results using 90-nm CMOS model parameters, the optimum frequency range, achieving better than ¡191 dBc/Hz of FoM, can be extended from 6-12 GHz to 1.5-12 GHz. I

A 10b 320 MS/s 40 mW Open-Loop Interpolated Pipeline ADC

Abstract An open-loop interpolated pipeline ADC is proposed. Weight controlled capacitor arrays are introduced to realize an interpolation and a pipelined operation with open-loop amplifiers. The 10-bit ADC fabricated in 90 nm CMOS demonstrates ENOB of 8.5b over 80 MHz bandwidth (BW) and a conversion rate of 320 MS/s without linearity compensation and consumes 40 mW. The FoMs are 780 fJ/c. Circuit description The input offset voltages, which reduce the linearity, are canceled and the accurate interpolated voltages can be generated if the gains of amplifiers are sufficiently similar. The first amplifiers use the differential CMOS amplifier with source degeneration resistors, as shown in Measurement results and conclusion The chip is fabricated in 90 nm CMOS technology and occupied area is 0.46 mm 2 , as shown i